Transistor Database

SiC/GaN/IGBT selection under your mission profile.

Comprehensive Device Library

Our transistor database includes detailed specifications, switching characteristics, and thermal properties for a wide range of power semiconductor devices.

Wide-Bandgap Devices

Silicon Carbide (SiC) and Gallium Nitride (GaN) transistors with comprehensive switching loss data and thermal models.

Traditional Semiconductors

IGBT and MOSFET libraries with datasheet parameters and validated performance models.

Mission Profile Analysis

Device selection optimised for your specific operating conditions, efficiency targets, and thermal constraints.

What a device record contains

A part number and a few headline numbers are not enough to size a converter. Every entry is stored as curves and waveforms — the form a loss model, a thermal solver, or an AI design agent can actually consume.

Double-pulse test waveform (raw record) Eon Eoff Itest VDC VGS ID VDS inductor charging (sets Itest) freewheel measurement pulse reverse recovery + Coss spike Lσ di/dt overshoot & ringing
Every device carries measured waveforms, not just a number. Full v/i captures at a stated DC-link voltage, gate resistance, loop inductance and junction temperature give integrated Eon and Eoff plus dv/dt, di/dt, overshoot and ringing frequency. A single datasheet energy figure does not transfer to your commutation loop — a waveform does.
Output characteristics 0 2 4 6 8 0 20 40 60 80 VDS (V) ID (A) VGS 18 V 16 V 14 V 12 V saturation · Tj = 25 °C
Source: digitised datasheet families plus curve-tracer measurements. Each record stores ID–VDS families at 25 / 125 / 175 °C, from which RDS(on), transconductance and de-saturation thresholds are extracted.
Junction capacitance vs. bias 0 200 400 600 800 1 pF 10 pF 100 pF 1 nF 10 nF VDS (V) C (log) Ciss Coss Crss Qoss / Eoss integrated to VDC
Why it is stored as a curve: integrating Coss(V) gives Qoss and Eoss, which set resonant commutation time, ZVS dead-time and whether zero-voltage switching closes at all. Crss sets dv/dt immunity and cross-talk margin.
Switching energy vs. current and Tj 0 10 20 30 40 0 200 400 600 800 ID (A) Esw (µJ) Eon Eoff Tj = 25 °C Tj = 150 °C
This is what a loss model consumes. Eon and Eoff are stored as a four-dimensional lookup over (I, VDC, Tj, Rg), so a mission-profile efficiency and junction-temperature iteration runs directly off the table instead of re-simulating every operating point.
Transient thermal impedance 1 µs 10 µs 100 µs 1 ms 10 ms 100 ms 0.001 0.01 0.1 1 pulse width tp Zth(j-c) (K/W) Rth(j-c) single pulse duty D = 0.2
Stored as a Foster/Cauer network, not a single number. Each package carries R–C ladder parameters that drop straight into an electro-thermal co-simulation, so junction-temperature swing ΔTj can be solved cycle by cycle over a mission profile — and ΔTj is exactly what a lifetime model needs.

Figures are illustrative of the stored data format. Background reading: double-pulse testing · static characterisation · gate charge & capacitance · transient thermal impedance.

Parameter coverage

Fields carried per device, with the test conditions attached. A value without its conditions is not data — so bias, temperature, gate drive and loop inductance travel with every number.

Static & package

  • VDS / VCES blocking voltage
  • RDS(on)(Tj) mΩ, normalised curve
  • ID–VDS families per VGS, per Tj
  • Vth, gfs with hysteresis where relevant
  • Body / freewheel diode VF, Qrr, trr
  • Package & footprint creepage, stray L, kelvin source

Dynamic

  • Ciss, Coss, Crss(V) full curve, not a point
  • Qg, Qgd, Qoss, Eoss integrated from curves
  • Eon, Eoff vs I, VDC, Tj, Rg
  • dv/dt, di/dt measured, per gate resistor
  • Overshoot & ringing with stated loop inductance
  • Raw DPT waveforms CSV, re-analysable

Thermal & reliability

  • Rth(j-c), Rth(j-a) K/W, stated boundary
  • Zth network Foster / Cauer R–C ladder
  • SOA & short-circuit withstand time, energy
  • Power-cycling data ΔTj vs cycles-to-fail
  • Derating rules voltage, current, temperature
  • Model links SPICE, PLECS, ANN surrogate

How it feeds a design

Shortlist under constraints

Filter by blocking voltage, current, package and cost, then rank by computed loss at your operating point rather than by datasheet headline figures.

Close the electro-thermal loop

Switching-energy tables and Zth networks solve together, so junction temperature, loss and derating converge instead of being assumed.

Feed the agent

The same records are exposed to AI-assisted design workflows, so a device choice comes back with the conditions and measurements that justify it.